##

ALLIANCE_TOP	= /opt/alliance-5.0

ENV_ASIMUT	= MBK_CATAL_NAME=CATAL_ASIMUT

ENV_COUGAR	= MBK_SPI_MODEL=$(ALLIANCE_TOP)/etc/spimodel.cfg ;\
		  export MBK_SPI_MODEL;\
		  MBK_IN_PH=ap ;\
		  export MBK_IN_PH;\
		  MBK_OUT_LO=spi;\
		  export MBK_OUT_LO

all: translate check-behavioral synthesis place-route transistors

#------------------------------------------------------------------------------
# Translate to Alliance VHDL

translate: sumador.vbe reg_1bit.vbe sum_reg1bit.vst

sumador.vbe: sumador.vhdl
	vasy -Vaop -I vhdl sumador

reg_1bit.vbe: reg_1bit.vhdl
	vasy -Vaop -I vhdl reg_1bit

sum_reg1bit.vst sum_reg1bit_model.vbe: sum_reg1bit.vhdl
	vasy -Vaop -I vhdl -H sum_reg1bit

#------------------------------------------------------------------------------
# Simulate

check-behavioral:  sumador.vbe reg_1bit.vbe sum_reg1bit.vst \
			test_sum_reg.pat result_sim.pat

test_sum_reg.pat: test_sum_reg.c
	genpat test_sum_reg

result_sim.pat: sum_reg1bit.vst test_sum_reg.pat
	$(ENV_ASIMUT) asimut sum_reg1bit test_sum_reg result_sim

view-behav: result_sim.pat
	xpat -l result_sim 

#------------------------------------------------------------------------------
# Synthesize

synthesis: reg_1bit.vst sumador.vst sum_reg1bit_model.vst

sumador.vst: sumador_boom.vbe
	boog -m 0 sumador_boom sumador
	loon -m 0 -o sumador

reg_1bit.vst: reg_1bit_boom.vbe
	boog -m 0 reg_1bit_boom reg_1bit
	loon -m 0 -o reg_1bit

sum_reg1bit_model.vst: sum_reg1bit_model_boom.vbe
	boog -m 0 sum_reg1bit_model_boom sum_reg1bit_model
	loon -m 0 -o sum_reg1bit_model

reg_1bit_boom.vbe: reg_1bit.vbe
	boom -i 10 -d 0 reg_1bit reg_1bit_boom

sumador_boom.vbe: sumador.vbe
	boom -i 10 -d 0 sumador sumador_boom

sum_reg1bit_model_boom.vbe: sum_reg1bit_model.vbe
	boom -i 10 -d 0 sum_reg1bit_model sum_reg1bit_model_boom

view-gates: sum_reg1bit.vst reg_1bit.vst sumador.vst sum_reg1bit_model.vst
	xsch -l sum_reg1bit

#------------------------------------------------------------------------------
# Place and Route

place-route: synthesis sum_reg1bit_ocp.ap sum_reg1bit_nero.ap \
		sum_reg1bit_s2r.cif

sum_reg1bit_ocp.ap: sum_reg1bit.vst
	ocp sum_reg1bit sum_reg1bit_ocp

sum_reg1bit_nero.ap: sum_reg1bit_ocp.ap sum_reg1bit.vst
	nero -p sum_reg1bit_ocp sum_reg1bit sum_reg1bit_nero

sum_reg1bit_s2r.cif: sum_reg1bit_nero.ap
	s2r sum_reg1bit_nero sum_reg1bit_s2r

view-place: synthesis sum_reg1bit_ocp.ap
	graal -l sum_reg1bit_ocp

view-route: synthesis sum_reg1bit_nero.ap
	graal -l sum_reg1bit_nero

view-real: synthesis sum_reg1bit_s2r.cif
	dreal -l sum_reg1bit_s2r

#------------------------------------------------------------------------------
# Extract transistor netlist

transistors: place-route sum_reg1bit_transistors.spi sumador_transistors.spi \
		reg_1bit_transistors.spi

sum_reg1bit_transistors.spi: sum_reg1bit_nero.ap
	$(ENV_COUGAR); cougar -t sum_reg1bit_nero sum_reg1bit_transistors

sumador_transistors.spi: sumador_nero.ap
	$(ENV_COUGAR); cougar -t sumador_nero sumador_transistors

reg_1bit_transistors.spi: reg_1bit_nero.ap
	$(ENV_COUGAR); cougar -t reg_1bit_nero reg_1bit_transistors

sumador_ocp.ap: sumador.vst
	ocp -rows 3 sumador sumador_ocp

sumador_nero.ap: sumador_ocp.ap sumador.vst
	nero -p sumador_ocp sumador sumador_nero

reg_1bit_ocp.ap: reg_1bit.vst
	ocp reg_1bit reg_1bit_ocp

reg_1bit_nero.ap: reg_1bit_ocp.ap reg_1bit.vst
	nero -p reg_1bit_ocp reg_1bit reg_1bit_nero

spice-sum_reg1bit: sum_reg1bit_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l sum_reg1bit_transistors

spice-sumador: sumador_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l sumador_transistors

spice-reg_1bit: reg_1bit_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l reg_1bit_transistors

clean:
	rm -rf  *.pat \
		*.vst \
		*.xsc \
		*.vbe \
		*.boom \
		*.ap \
		*.cif \
		*.spi \
		*.dat \
		*~
